Dr. Piyushkumar Kamani | Electrical Engineering Award | Best Researcher Award
Dr. Piyushkumar Kamani, Government Engineering College Bhuj, India
Publication Profile
š« Educational Journey
Dr. Kamani holds a Doctorate in Electrical Engineering from Sardar Vallabhbhai National Institute of Technology, Surat. Prior to this, he earned his Master’s in Industrial Electronics from M. S. University, Baroda, and a Bachelor’s in Electrical Engineering from Saurashtra University, Rajkot.
š Professional Background
Piyush Kumar Kamani, a Senior Professor at Government Engineering College, boasts over two decades of teaching experience, spanning various academic levels. His expertise includes guiding postgraduate students, fostering creativity, and engaging learners through innovative pedagogy.
š Professional Achievements
Dr. Kamani’s research impact is notable. Additionally, he has secured a research grant from TEQIP-III, SVNIT, Surat, showcasing his commitment to advancing knowledge in his field. š
š Research Focus
Publication Top Notes
š Middle-level SHE pulse-amplitude modulation for cascaded multilevel inverters š Cited by: 72 š
Year: 2018
š A new multilevel inverter topology with reduced device count and blocking voltage š Cited by: 9 š
Year: 2016
š A Home-type (H-type) cascaded multilevel inverter with reduced device count: analysis and implementation š Cited by: 8 š
Year: 2020
š Simplified SHE pulse-amplitude modulation for multilevel inverters š Cited by: 7 š
Year: 2018
š New selective harmonic elimination-pulse-width modulation for cascaded H-bridge multilevel inverters š Cited by: 5 š
Year: 2018
š Simpson’s rule based SHE pulse-amplitude modulation for cascaded multilevel inverters š Cited by: 5 š
Year: 2017
š Online SHE technique for cascaded multilevel inverters with adjustable dc sources š Cited by: 3 š
Year: 2020
š Univariate equation-based SHE-PWM for multilevel inverter š Cited by: 2 š
Year: 2019
š Multi-verse optimizer based selective harmonic elimination with optimal dc source for multilevel inverters š Cited by: 1 š
Year: 2023
š A new multilevel inverter with reduced component count and reduced voltage stress š Cited by: 1 š
Year: 2016